[Verilog] Procedures

Always blocks

for synthesizing hardware, two types of always blocks are relevant:

• Combinational: always @(*) 
• Clocked: always @(posedge clk)

Combinational always block은 assign statements와 같다. procedural block 안의 문법은 바깥과 꽤 다르다. if-then, case 등을 사용할 수 있다.

 

Blocking vs. Non-Blocking Assignment

• Continuous assignments (assign x = y;). Can only be used when not inside a procedure ("always block").
• Procedural blocking assignment: (x = y;). Can only be used inside a procedure.
• Procedural non-blocking assignment: (x <= y;). Can only be used inside a procedure.

Combinational always block에서는 blocking assignment 사용한다. Clocked always block에서는 non-blocking assignment를 사용한다.

 

1. If Statement

always @(*) begin
    if (condition) begin
        out = x;
    end
    else begin
        out = y;
    end
end

 

2. Case Statement

always @(*) begin   
    case (in)
      1'b1: begin 
               out = 1'b1;  // begin-end if >1 statement
            end
      1'b0: out = 1'b0;
      default: out = 1'bx;
    endcase
end

 

Casez Statement

    casez (in[3:0])
        4'bzzz1: ...
        4'bzz10: ...
        4'bz100: ...
        4'b1000: ...
        default: ...
    endcase